Intel attempts to regain leadership position in global chip manufacturing
Intel, a leading American semiconductor company, has faced increasing challenges in recent years, as its position in the global chip market has been overshadowed by Taiwan Semiconductor Manufacturing Company (TSMC). This shift has occurred despite U.S. efforts to revitalize domestic semiconductor manufacturing through the CHIPS Act, highlighting that industrial policy alone has yet to deliver the intended results.
For decades, Intel was the largest semiconductor producer in the world. Known for producing the first commercially available microprocessor in 1971, Intel once powered the vast majority of personal computers and servers.
However, Intel started to fall behind with the emergence of smartphones. Apple considered using Intel for its phone’s chips, but ultimately decided to use Samsung chips before they started manufacturing their own through ARM. Although Apple continued to use Intel chips for its computers, the company switched to ARM chips in 2020.
ARM is a British company that designs chips and licenses them to various companies, including Apple, Samsung, and Qualcomm. By using ARM, technology companies like Apple can design custom chips and retain ownership over their intellectual property. This requires companies to either build their own chip factories, which costs billions to build, or find another chip manufacturer.
Luckily, the Taiwan Semiconductor Manufacturing Company (TSMC) was founded based on this “fabless” manufacturing model, in which they receive designs from companies to manufacture instead of only manufacturing their own design. This model was the first to allow companies to manufacture custom-designed chips with the assurance competitors could not access the same design. It became wildly successful. As TSMC began to manufacture Apple and other tech giants’ chips, Intel, which only manufactured its own design, began to fall behind.
Intel’s struggles were further compounded by delays in transitioning to 10 nm transistor technology, a crucial step in maintaining its leadership in chip production which depends on consistently making technology smaller and faster. This stagnation was exacerbated by former CEO Brian Krzanich’s failure to invest in Extreme Ultraviolet (EUV) lithography, a cutting-edge technology embraced by TSMC and other competitors to produce advanced chips. Originally scheduled for 2016, Intel’s 10nm process faced repeated setbacks, allowing TSMC to take the lead in producing smaller, more efficient chips. While TSMC successfully moved to 7nm and 5nm processes, Intel’s delays hurt its competitiveness, especially in the mobile and data center markets.
Current Intel CEO Pat Gelsinger told investors “Job number one was to accelerate our efforts to close the technology gap that was created by over a decade of underinvestment.” Gelsinger is taking drastic measures to catch up technologically and improve earnings after a long period of declining revenue and dropping stock. These measures include starting to manufacture other chip designs, shifting Intel to a “fabless” manufacturing system.
This may work in Intel’s favor, as companies are actively seeking to decrease reliance on TSMC amid growing concerns about supply chain vulnerabilities and geopolitical tensions. President Biden's administration has made domestic chip manufacturing a national priority through the CHIPS Act, which allocates billions in incentives for building semiconductor fabs in the U.S. Intel is well-positioned to benefit from this push, with plans to invest heavily in new manufacturing plants across states like Ohio and Arizona.
These efforts are part of a broader strategy to diversify chip production and reduce dependence on foreign suppliers, particularly from Taiwan. However, while the CHIPS Act provides a strong framework for revitalizing U.S. semiconductor capabilities, Intel still faces the challenge of catching up to TSMC's technological lead and proving that its domestic operations can be both cost-effective and competitive on the global stage.